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CTCSS na PIC12F675
SP8NTP Offline
Andrzej
**

Liczba postów: 71
Dołączył: 30-10-2016
Post: #1
CTCSS na PIC12F675
Witam,
znalazłem źródło Kolegi ZS1AYJ.
Czy ktoś z Kolegów mógłby pomóc i wskazać zmiany dla 103,5Hz?
Tyle wiem: 103,5 / 0,00192273 = 53830 = ???
Zmienić chyba trzeba przedostatnią linię kodu ?.
Potrzebuję do swojego Radmora 3001 hi hi.

Pozdrawiam
Andrzej
Kod:
; TERRY COTTON ZS1AYJ - VERSION 1.0 JANUARY 2007

; USES PIC12F675 AS A DDS GENERATOR. PHASE ACCUMULATOR IS 24 BITS
; AND PHASE INCREMENT is 16 BITS. GPIO 0-2 IS THE 3 BIT OUPUT TO
; THE CRUDE RESISTOR DAC.
; THIS CODE USES A 256 BYTE (8 BIT) LOOKUP TABLE BUT ONLY A
; 3 BIT OUTPUT VALUE. THIS IS FOR VERSATILITY. IT ALLOWS UP
; TO 8 BIT OUTPUT WITH A DIFFERENT MICRO AND A SIMPLE CHANGE
; TO THE TABLE DATA.
; THE CODE IS 'HARD WIRED" TO PRODUCE 88.5 HZ BUT ANY OTHER
; FREQUENCY CAN BE PRODUCED WITH A DIFFERENT PHASE INCREMENT.
; SEE THE EXPLANATORY TEXT BELOW AND THE 2ND LAST LINE OF
; CODE FOR THE PRESET VALUE WHICH IS STORED IN EEPROM
;*************************************************​********************

        include "P12F675.inc"
        list p=12F675, r=dec, st=on ;radix 10, produce symbol table
        ;code protection off
        ;power-on timer on
        ;watchdog timer off
        ;HS Oscillator
        __config _CP_OFF & _PWRTE_ON & _WDT_OFF & _XT_OSC

#DEFINE BANK0   BCF STATUS,RP0    ;Select register Bank 0.
#DEFINE BANK1   BSF STATUS,RP0    ;Select register Bank 1.

gpio        equ 5

; General Purpose register definitions
;*************************************************​*************
            CBLOCK 020h
PHASEACC0        ; lsb of phase accumulator
PHASEACC1            
PHASEACC2        ; msb of phase accumulator    
PHASEINCR0        ; phase increment lsb
PHASEINCR1        ; phase increment msb
TEMPSTORE        ; temp storage for table lookup routine
            ENDC
;*************************************************​*************
              
        ORG 0                   ; Reset Vector address
                GOTO 5                  ; go to PIC address location 5
                ORG 4                   ; Interrupt Vector address
                GOTO 5                  ; go to PIC address location 5
                ORG 5                   ; Start of Program Memory at location 5

        clrf INTCON        ; all interrupts disabled
        clrf GPIO
        movlw 7            ; set GP0-2 as digital I/O
        movwf CMCON

                BANK1
        clrf ANSEL        ; Digital I/O
        movlw 038h
        movwf TRISIO        ; GP0-2 as output

                clrf OPTION_REG         ; (no options required)
                clrf PIE1        ; disable all peripheral ints
                BANK0                  
        
; initialise phase accumulator
        clrf    phaseacc1
        clrf    phaseacc0
        clrf    phaseacc2
;*************************************************​**
; The DDS loop below takes 31uS to execute with 4 MHz crystal
; loop frequency is therefore 1000000/31 = 32258.06 Hz
;
; Phase resolution = loop frequency/2^24 which is
; the maximum value of a 24 bit phase accumulator 16777216 decimal)
;
; Phase resolution 32258.06 / 16777216 = 0.00192273 Hz
; initialise phase increment for 88.5
; The required phase increment = output frequency / phase resolution
; 88.5 / 0.00192273 = 46028 = B3CCh

;*************************************************​**
; In this design only 2 bytes are used to store the phase
; increment. This is to maximise the loop frequency and hence
; minimise the phase resolution. This limits the range of
; frequencies which can be generated to the range .0019 Hz to
; 127 Hz
;
; Instead of hard-coding the phase increment calculated above,
; it is instead stored in EEPROM as 2 hexadecimal digits.
; This is to make a change of frequency a simpler process.
; Instead of re-assembling the source code, the 2 bytes at the
; end of the hex file can simply be be edited with a text editor
; to change the phase increment to the required value.
;
; Read the 2 phase increment bytes from EEPROM. In the case of
; the 88.5 Hz calculation above, the first byte 1 = B3h and
; byte 2 = CCh
;*************************************************​**
        movlw    0
        call    EEPROMread    ; read first byte
        movwf    phaseincr1
        movlw     1        
        call    EEPROMread    ; read second byte
        movwf    phaseincr0
;*************************************************​**
; START OF DDS LOOP. NOTE THAT THE NOP'S ARE TO GIVE
; A CONSTANT 31uS LOOP TIME REGARDLESS OF WHETHER THERE
; ARE 0, 1 or 2 CARRYS
;*************************************************​**
main
        movf    phaseincr0,w    ;Add byte 0
        addwf    phaseacc0,f
        bc    carry1        ;jump if carry into byte 1
        nop
        nop
        nop
        nop
        nop
        nop
        b    addbyte2        
carry1        movlw    1
        addwf     phaseacc1,f
        bc    carry2
        nop
        b    addbyte2
carry2
        movlw    1
        addwf     phaseacc2,f

addbyte2    
        movf    phaseincr1,w    ;Add byte phaseincr1
        addwf    phaseacc1,f    ;to phasecc1
        bc    carry3        ;jump if carry into byte 2
        nop
        b    lookup        
carry3        movlw    1
        addwf     phaseacc2,f
;*************************************************​**
; THE ABOVE CODE HAS ADDED THE PHASE INCREMENT TO THE
; PHASE ACCUMULATOR. NOW USE THE VALUE OF THE MOST
; SIGNIFICANT 8 BITS OF THE PHASE ACCUMULATOR TO ADDRESS
; A 256 BYTE TABLE WHICH CONTAINS THE DIGITAL OUTPUT TO
; BE PRESENTED TO THE DAC AT THIS PHASE OF THE SINE WAVE
;*************************************************​**

lookup
        call     tablesub        
        movwf    gpio    ;PRESENT VALUE ON GPIO 0-2
        b    main
;*************************************************​**
; END OF DDS LOOP
;*************************************************​**

; lookup table hard coded as 256 bytes max starting at 100h
TABLESUB        movlw    1
        movwf    pclath        ;set pclath=1
        movf    phaseacc2,w
        movwf    pcl        ;change pcl to execute jump

        org 100h
; The lookup table values are calculated for 3 bit digital
SINE
                retlw 4
                retlw 4
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                retlw 3

;*************************************************​
; Read a byte from EEPROM. Enter with W =address to be read
; Exit with W = data read from that address
;*************************************************​
EEPROMread
        Bank1
        movwf EEADR     ;Address to read
        bsf EECON1,RD     ;EE Read
        movf EEDATA,W     ;Move data to W
        bank0
        return

;*************************************************​
; Preset first 2 bytes of EEPROM to the required
; phase increment. These will be B3CCh for 88.5 Hz
;*************************************************​
        org 2100h

        de 0b3h,0cch    ;phase increment
    
        end
06-04-2017 19:03
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SQ8MVY Offline
Paweł
****

Liczba postów: 724
Dołączył: 30-07-2011
Post: #2
RE: CTCSS na PIC12F675
(06-04-2017 19:03)SP8NTP napisał(a):  Witam,
znalazłem źródło Kolegi ZS1AYJ.
Czy ktoś z Kolegów mógłby pomóc i wskazać zmiany dla 103,5Hz?
Tyle wiem: 103,5 / 0,00192273 = 53830 = ???

103,5 / 0,00192273 = 53830 = D246

Kod:
;*************************************************​
; Preset first 2 bytes of EEPROM to the required
; phase increment. These will be D246h for 103.5 Hz
;*************************************************​
        org 2100h

        de 0d2h,046h    ;phase increment
    
        end

73 Paweł
06-04-2017 19:35
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SP8NTP Offline
Andrzej
**

Liczba postów: 71
Dołączył: 30-10-2016
Post: #3
RE: CTCSS na PIC12F675
Paweł,
wielkie dzięki , jak "sklecę" całość dam znać czy działa.

Pozdrawiam
Andrzej
Nie mogę tego skompilować , zbyt wiele błędów.
Coś tu jest namieszane a hex z tej strony po "odwróceniu" do asm pokazuje to:
Kod:
; Generated by WinDis84, (c) Nigel Goodwin 1998.

            LIST      P=16F84, F=INHX8M
            include "P16FXX.inc"
            ORG     0x0000

            GOTO    Label_0001
            ORG     0x0004
            GOTO    Label_0001
Label_0001  CLRF    INTCON
            CLRF    PORTA
            MOVLW   0x07
            MOVWF   0x19
            BSF     STATUS    , RP0
            CLRF    0x1F
            MOVLW   0x38
            MOVWF   TRISA
            CLRF    OPTION_REG
            CLRF    0x0C
            BCF     STATUS    , RP0
            CLRF    0x21
            CLRF    0x20
            CLRF    0x22
            MOVLW   0x00
            CALL    Label_0002
            MOVWF   0x24
            MOVLW   0x01
            CALL    Label_0002
            MOVWF   0x23
Label_0009  MOVF    0x23      , W
            ADDWF   0x20      , f
            BTFSC   STATUS    , C
            GOTO    Label_0003
            NOP
            NOP
            NOP
            NOP
            NOP
            NOP
            GOTO    Label_0004
Label_0003  MOVLW   0x01
            ADDWF   0x21      , f
            BTFSC   STATUS    , C
            GOTO    Label_0005
            NOP
            GOTO    Label_0004
Label_0005  MOVLW   0x01
            ADDWF   0x22      , f
Label_0004  MOVF    0x24      , W
            ADDWF   0x21      , f
            BTFSC   STATUS    , C
            GOTO    Label_0006
            NOP
            GOTO    Label_0007
Label_0006  MOVLW   0x01
            ADDWF   0x22      , f
Label_0007  CALL    Label_0008
            MOVWF   PORTA
            GOTO    Label_0009
Label_0008  MOVLW   0x01
            MOVWF   PCLATH
            MOVF    0x22      , W
            MOVWF   PCL
            ORG     0x0100
            RETLW   0x04
            RETLW   0x04
            RETLW   0x04
            RETLW   0x04
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            RETLW   0x04
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            RETLW   0x01
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            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x00
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x01
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x02
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
            RETLW   0x03
Label_0002  BSF     STATUS    , RP0
            MOVWF   0x1B
            BSF     0x1C      , 00
            MOVF    0x1A      , W
            BCF     STATUS    , RP0
            RETURN

            ORG     0x2000
            DATA    0x0F
            DATA    0x0F
            DATA    0x0F
            DATA    0x0F

            ORG     0x2007
            DATA    0x01


            END
(Ten post był ostatnio modyfikowany: 08-04-2017 15:46 przez SP8NTP.)
06-04-2017 21:45
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SP8NTP Offline
Andrzej
**

Liczba postów: 71
Dołączył: 30-10-2016
Post: #4
Sad RE: CTCSS na PIC12F675
Chyba zrobię na PIC16F628A ( a chciałem żeby było małe )
(Ten post był ostatnio modyfikowany: 09-04-2017 10:32 przez SP8NTP.)
09-04-2017 10:32
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Andrzej
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Liczba postów: 71
Dołączył: 30-10-2016
Post: #5
Tongue RE: CTCSS na PIC12F675
Pomogę sobie sam ( a może komuś się przyda?). Moja próba utworzenia pliku HEX dla 103,5Hz do układu ZS1AYJ
Jeszcze nie sprawdzone czy działaTongue
Poprawiłem HEX-a teraz wydaje się być prawidłowy.


Załączone pliki
.hex  CTCSS_103.5Hz_2.HEX (Rozmiar: 1.84 KB / Pobrań: 1116)
(Ten post był ostatnio modyfikowany: 20-04-2017 13:55 przez SP8NTP.)
20-04-2017 5:47
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Andrzej
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Liczba postów: 71
Dołączył: 30-10-2016
Post: #6
RE: CTCSS na PIC12F675
Trochę dodatkowych informacji nt. tego UKŁADU
20-04-2017 21:10
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